pi74fct163373 3.3v 16-bit transparent latch 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 ps2055b 01/18/99 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74fct163373 fast cmos 3.3v 16-bit transparent latch product description pericom semiconductors pi74fct series of logic circuits are produced in the companys advanced 0.6 micron cmos technology, achieving industry leading speed grades. the pi74fct163373 is a 16-bit transparent latch designed with 3-state outputs and are intended for bus oriented applications. the output enable and latch enable controls are organized to operate as two 8-bit latches or one 16-bit latch. when latch enable (le) is high, the flip-flops appear transparent to the data. the data that meets the set-up time when le is low is latched. when oe is high, the bus output is in the high impedance state. product features ? advanced low power cmos operation ? can serve as a 5v to 3v translator ? excellent output drive capability: balanced drives (24ma sink and source) compatible with lvc tm class of products. ? pin compatible with industry standard double-density pinouts ? low ground bounce outputs ? hysteresis on all inputs ? industrial operating temperature range: C40c to +85c ? inputs can be driven by 3.3v or 5v devices ? multiple center pin and distributed vcc/gnd pins minimizing switching noise ? packages available: C 48-pin 240 mil wide plastic tssop (a) C 48-pin 300 mil wide plastic ssop (v) C 48-pin 173 mil wide plastic tvsop (k) ? device models available on request logic block diagram 1 oe 1 le 1 o 0 c d 1 d 0 to 7 other channels 2 oe 2 le 2 o 0 c d 2 d 0 to 7 other channels
pi74fct163373 3.3v 16-bit transparent latch 2 ps2055b 01/18/99 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 oe 1 1 o 0 2 1 o 1 3 gnd 4 1 o 2 5 1 o 3 6 v cc 7 1 o 4 8 1 o 5 9 gnd 10 1 o 6 11 1 o 7 12 2 o 0 13 2 o 1 14 gnd 15 2 o 2 16 2 o 3 17 v cc 18 2 o 4 19 2 o 5 20 gnd 21 2 o 6 22 2 o 7 23 2 oe 24 1 le 48 1 d 0 47 1 d 1 46 gnd 45 1 d 2 44 1 d 3 43 v cc 42 1 d 4 41 1 d 5 40 gnd 39 1 d 6 38 1 d 7 37 2 d 0 36 2 d 1 35 gnd 34 2 d 2 33 2 d 3 32 v cc 31 2 d 4 30 2 d 5 29 gnd 28 2 d 6 27 2 d 7 26 2 le 25 product pin configuration product pin description pin name description xoe 3-state output enable inputs (active low) xle latch enable inputs (active high) xdx data inputs xox 3-state outputs gnd ground v cc power inputs (1) outputs (1) xdx xle xoe xox hh l h lh l l xx h z truth table note: 1. h = high voltage level, x = dont care, l = low voltage level, z = high impedance 48-pin v48 a48 k48 note: 1. this parameter is determined by device characterization but is not production tested. capacitance (t a = 25c, f = 1 mhz) parameters (1) description test conditions typ. max. units c in input capacitance v in = 0v 4.5 6 pf c out output capacitance v out = 0v 5.5 8 pf
pi74fct163373 3.3v 16-bit transparent latch 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 3 ps2055b 01/18/99 dc electrical characteristics (over the operating range, t a = C40c to +85c, v cc = 2.7v to 3.6v) parameters description test conditions (1) min. typ (2) max. units v ih input high voltage (input pins) guaranteed logic high level 2.2 5.5 v input high voltage (i/o pins) 2.0 vcc+0.5 v v il input low voltage guaranteed logic low level C0.5 0.8 v (input and i/o pins) i ih input high current (input pins) v cc = max. v in = 5.5v 1 a input high current (i/o pins) v cc = max. v in = v cc 1a i il input low current (input pins) v cc = max. v in = gnd 1 a input low current (i/o pins) v cc = max. v in = gnd 1 a i ozh high impedance output current v cc = max. v out = v cc 1a i ozl (3-state output pins) v cc = max. v out = gnd 1 a v ik clamp diode voltage v cc = min., i in = C18 ma C0.7 C1.2 v i odh output high current v cc = 3.3v, v in = v ih or v il , v o = 1.5v (3) C36 C60 C110 ma i odl output low current v cc = 3.3v, v in = v ih or v il , v o = 1.5v (3) 50 90 200 ma v oh output high voltage v cc = min. i oh = C0.1ma vcc-0.2 v v in = v ih or v il i oh = C3ma 2.4 3.0 v v cc = 3.0v, i oh = C8ma 2.4 (5) 3.0 v v in = v ih or v il i oh = C24ma 2.0 v v ol output low voltage v cc = min. i ol = 0.1ma 0.2 v v in = v ih or v il i ol = 16ma 0.2 0.4 v i ol = 24ma 0.3 0.5 v i os short circuit current (4) v cc = max. (3) , v out = gnd C60 C85 C240 ma v h input hysteresis 150 mv storage temperature ......................................................... C55c to +125c ambient temperature with power applied ........................ C40c to +85c supply voltage to ground potential (inputs & vcc only) .. C0.5v to +7.0v supply voltage to ground potential (outputs & d/o only) C0.5v to +7.0v dc input voltage ................................................................. C0.5v to +7.0v dc output current ........................................................................... 120 ma power dissipation ................................................................................. 1.0w note: stresses greater than those listed under maximum ratings may cause permanent damage to the de- vice. this is a stress rating only and functional opera- tion of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device type . 2. typical values are at vcc = 3.3v, +25c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. this parameter is guaranteed but not tested. 5. v oh = v cc C 0.6v at rated current. maximum ratings (above which the useful life may be impaired. for user guidelines, not tested.)
pi74fct163373 3.3v 16-bit transparent latch 4 ps2055b 01/18/99 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 power supply characteristics parameters description test conditions (1) min. typ (2) max. units i cc quiescent power supply current v cc = max. v in = gnd or v cc 0.1 10 a d i cc quiescent power supply current v cc = max. v in = v cc C 0.6v (3) 2.0 30 a ttl inputs high i ccd dynamic power supply (4) v cc = max., v in = v cc 50 75 a/ outputs open v in = gnd mhz x oe = gnd xle = vcc one bit toggling 50% duty cycle i c total power supply v cc = max., v in = v cc C 0.6v 0.5 0.8 ma current (6) outputs open v in = gnd f i = 10 mh z 50% duty cycle x oe = gnd x le = v cc one bit toggling v cc = max., v in = v cc C 0.6v 2.0 3.3 (5) outputs open v in = gnd f i = 2.5 mh z 50% duty cycle x oe = gnd x le = v cc 16 bits toggling notes: 1. for max. or min.conditions, use appropriate value specified under electrical characteristics for the applicable device. 2. typical values are at vcc = 3.3v, +25c ambient. 3. per ttl driven input; all other inputs at vcc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the icc formula. these limits are guaranteed but not tested. 6. i c =i quiescent + i inputs + i dynamic i c = i cc + d i cc d h n t + i ccd (f cp /2 + f i n i ) i cc = quiescent current (i ccl , i cch and i ccz ) d i cc = power supply current for a ttl high input d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) n cp = number of clock inputs at f cp f i = input frequency n i = number of inputs at f i all currents are in milliamps and all frequencies are in megahertz.
pi74fct163373 3.3v 16-bit transparent latch 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 5 ps2055b 01/18/99 switching characteristics over operating range (1) fct163373 fct163373a fct163373c com. com. com. parameters description conditions (2) min. (3) max. min. (3) max. min. (3) max. units t plh propagation delay c l = 50 pf 1.5 8.0 1.5 5.2 1.5 4.2 ns t phl xdx to xox r l = 500 w t plh propagation delay 2.0 13.0 2.0 8.5 2.0 5.5 ns t phl xle to xox t pzh output enable time 1.5 12.0 1.5 6.5 1.5 5.5 ns t pzl xoe to xox t phz output disable time (4) 1.5 7.5 1.5 5.5 1.5 5.0 ns t plz xoe to xox t su setup time high 2.0 2.0 2.0 ns or low, xdx to xle t h hold time high 1.5 1.5 1.5 ns or low, xdx to xle t w xle pulse width 6.0 5.0 5.0 ns high t sk (o) output skew (5) 0.5 0.5 0.5 ns notes: 1. propagation delays and enable/disable times are with vcc = 3.3v 0.3v, normal range. for vcc = 2.7v, extended range, all propagation delays and enable/disable times should be degraded by 20%. 2. see test circuit and wave forms. 3. minimum limits are guaranteed but not tested on propagation delays. 4. this parameter is guaranteed but not production tested. 5. skew between any two outputs, of the same package, switching in the same direction. this parameter is guaranteed by design. pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com
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